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1 instruction operand
Автоматика: операнд команды -
2 instruction operand
English-Russian electronics dictionary > instruction operand
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3 instruction operand
The New English-Russian Dictionary of Radio-electronics > instruction operand
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4 instruction operand
English-Russian dictionary of mechanical engineering and automation > instruction operand
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5 machine instruction operand
English-Russian electronics dictionary > machine instruction operand
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6 machine instruction operand
The New English-Russian Dictionary of Radio-electronics > machine instruction operand
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7 operand fetch
= operand fetching; = OFодна из стадий исполнения процессором машинной команды; следует за декодированием кода операцииАнгло-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. > operand fetch
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8 operand
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9 operand
вчт.- denormalized operand
- immediate operand
- instruction operand
- machine instruction operand
- normalized operand
- operator operand
- string operandThe New English-Russian Dictionary of Radio-electronics > operand
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10 operand
операнд, операнд операции; компонент операции; порция данных, обработка которой составляет операцию- instruction operandEnglish-Russian dictionary of mechanical engineering and automation > operand
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11 instruction cycle
= instruction execution cycleцикл исполнения команды, командный цикл1) последовательность шагов ЦП для исполнения команды. Обычная схема исполнения состоит из пяти шагов: выборка (fetch), декодирование (instruction decoding), выборка операндов (operand fetch), исполнение команды (ALU operation), запись результата (result writeback).Syn:2) время, затрачиваемое центральным процессором на исполнение одной команды. Зависит от быстродействия ОЗУ, тактовой частоты, разрядности (ширины) шины данных и архитектуры процессора.Англо-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. > instruction cycle
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12 instruction
2) инструкция; программа действий3) обучение•- accumulator shift instruction
- actual instruction
- address modification instruction
- addressless instruction
- alphanumeric instruction
- alphameric instruction
- arithmetical instruction
- arithmetic instruction
- assignment instruction
- autocode instruction
- autoindexed instruction
- basic instruction
- bit-manipulation instruction
- blank instruction
- block-move instruction
- branching instruction
- branch instruction
- branching-programmed instruction
- branch-on-zero instruction
- breakpoint instruction
- broadcast instruction
- byte instruction
- call instruction
- card read instruction
- character-oriented instruction
- clear and add instruction
- clear store instruction
- clearing instruction
- compare instruction
- comparison instruction
- complete instruction
- compound instruction
- computer instruction
- computer-aided instruction
- computer-assisted instruction
- conditional assembly instruction
- conditional branch instruction
- conditional breakpoint instruction
- conditional instruction
- conditional jump instruction
- conditional stop instruction
- conditional transfer instruction
- conflicting instructions
- constant instruction
- consumer instruction
- control instruction
- control transfer instruction
- convert instruction
- current instruction
- data movement instruction
- data transfer instruction
- decimal instruction
- decision instruction
- declarative instruction
- decoded instruction
- diagnose instruction
- direct access instruction
- direct instruction
- discarded instruction
- discrimination instruction
- display instruction
- do-nothing instruction
- double-precision instruction
- dual-issued instructions
- dummy instruction
- edit instruction
- effective instruction
- engineering instruction
- entry instruction
- exchange instruction
- executive instruction
- external devices instruction
- extracode instruction
- extract instruction
- floating-point instruction
- follow the instructions carefully
- format instruction
- four-address instruction
- full-word instruction
- general instruction
- half-word instruction
- halt instruction
- housekeeping instruction
- idle instruction
- ignore instruction
- illegal instruction
- immediate address instruction
- immediate instruction
- imperative instruction
- indirect instruction
- input/output instruction
- inquiry input/output instruction
- integer instruction
- internal manipulation instruction
- interpretive instruction
- interrupt instruction
- interruptable instruction
- invitation instruction
- invite instruction
- iterative instruction
- jump instruction
- jump to subroutine instruction
- keyboard instruction
- linear programmed instruction
- link instruction
- linkage macro instruction
- load index register instruction
- load repeat counter instruction
- logical instruction
- logic instruction
- look-up instruction
- machine code instruction
- machine instruction
- machine language instruction
- macro instruction
- macroexpansion instruction
- macroprocessing instruction
- maintenance instruction
- math instruction
- memory load instruction
- memory protect privileged instruction
- memory-reference instruction
- micro instruction
- microprogrammable instruction
- mnemonic instruction
- modified instruction
- monadic instruction
- monitor call instruction
- motion video instruction
- move instruction
- MQ register sign jump instruction
- MQ sign jump instruction
- multiaddress instruction
- multilplying instruction
- multiple-address instruction
- multiple instruction
- multiple-cycle instruction
- multiple-length instruction
- multiplier-quotient register sign jump instruction
- multiplier-quotient sign jump instruction
- multiply-accumulate instruction
- N-address instruction
- native instruction
- noaddress instruction
- nonmemory-reference instruction
- nonprint instruction
- nonprivileged instruction
- non-speculative instruction
- no-op instruction
- no-operation instruction
- normalized instruction
- normalize instruction
- N-plus-one address instruction
- null instruction
- object instruction
- on-chip instruction
- one-address instruction
- one-and-a-half-address instruction
- one-over-one address instruction
- one-plus-one address instruction
- on-screen instruction
- operational-address instruction
- operation-address instruction
- optional halt instruction
- optional pause instruction
- optional stop instruction
- organizational instruction
- overflow jump instruction
- overriding instruction
- pause instruction
- picture-description instruction
- preempted instruction
- presumptive instruction
- prewired instruction
- privileged instruction
- producer instruction
- programmed instruction
- propagation instruction
- pseudo instruction
- quadruple address instruction
- quasi instruction
- reading instruction
- read instruction
- red-tape instruction
- reference instruction
- register-to-register instruction
- relative instruction
- repeat instruction
- repetition instruction
- restart instruction
- return instruction
- right shift instruction
- rotate instruction
- roundoff instruction
- scalar instruction
- search instruction
- seek instruction
- shift instruction
- shift-jump instruction
- short instruction
- single-address instruction
- single-cycle instruction
- single-operand instruction
- skeleton instruction
- skip instruction
- source-designation instruction
- source-destination instruction
- stack instruction
- steering instruction
- stop instruction
- string instruction
- summarize instruction
- supervisor call instruction
- symbolic instruction
- table look-up instruction
- tape instruction
- text-entry instruction
- three-address instruction
- three-plus-one-address instruction
- transfer instruction
- transfer of control instruction
- trap instruction
- try instruction
- two-address instruction
- two-plus-one-address instruction
- unconditional branch instruction
- unconditional control transfer instruction
- unconditional jump instruction
- unconditional transfer instruction
- unmodified instruction
- unretired instruction
- variable instruction
- variable length instruction
- variable-cycle instruction
- vector-processing instruction
- vector instruction
- verbal instruction
- waste instruction
- write instruction
- zero-address instruction
- zeroing instruction
- zero-suppress instructionEnglish-Russian dictionary of computer science and programming > instruction
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13 instruction cycle
1) Общая лексика: цикл исполнения команды (1) последовательность шагов ЦП для исполнения команды. Обычная схема исполнения состоит из пяти шагов: выборка (fetch), декодирование (instruction decoding), выборка операндов (operand fetch), исполнение ком)2) Техника: командный цикл, цикл команды3) Вычислительная техника: цикл выполнения команды -
14 instruction issue
= issueв ЦП - процесс отправки команды и значений её операндов-источников (если они все доступны) на исполнение функциональному устройствуАнгло-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. > instruction issue
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15 source operand
операнд команды, над которым производится действиеАнгло-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. > source operand
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16 single-operand instruction
однооперандная команда; команда с одним операндомEnglish-Russian base dictionary > single-operand instruction
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17 machine instruction
содержит код операции ( opcode) и от 0 до N операндов (operand).Syn:Англо-русский толковый словарь терминов и сокращений по ВТ, Интернету и программированию. > machine instruction
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18 single-operand instruction
Большой англо-русский и русско-английский словарь > single-operand instruction
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19 single-operand instruction
Вычислительная техника: команда с одним операндом, однооперандная командаУниверсальный англо-русский словарь > single-operand instruction
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20 storage-to-immediate operand instruction
Вычислительная техника: команда формата "память-непосредственный операнд"Универсальный англо-русский словарь > storage-to-immediate operand instruction
См. также в других словарях:
Operand forwarding — refer to computer architecture. When concurrent execution in pipelining is stalled due to a data hazard, then operand forwarding is used. E.g. : r1=r2+r3 r5=r4+r1 In this instructions a hazard occurred at line 2,to overcome this we use… … Wikipedia
Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… … Wikipedia
Operand — In mathematics, an operand is the object of a mathematical operation, a quantity on which an operation is performed.[1] Contents 1 Example 2 Notation 2.1 Expressions as operands … Wikipedia
Instruction (computer science) — In computer science, an instruction is a single operation of a processor defined by an instruction set architecture. In a broader sense, an instruction may be any representation of an element of an executable program, such as a bytecode.On… … Wikipedia
Instruction set — Der Befehlssatz (englisch: instruction set, weshalb in der deutschen Sprache der Begriff Instruktion synonym für Befehl verwendet wird) bezeichnet in der Informatik die Menge der Maschinenbefehle eines Mikroprozessors. Der Umfang des… … Deutsch Wikipedia
Instruction pipeline — Pipelining redirects here. For HTTP pipelining, see HTTP pipelining. Basic five stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back). In the fourth clock… … Wikipedia
Instruction Set Architecture — Eine Befehlssatzarchitektur (engl. Instruction Set Architecture, kurz: ISA) ist – vereinfacht gesagt – die formale Spezifikation bestimmter Verhaltensweisen eines Prozessors aus Sicht seines Programmierers, auf die sich dieser bei der… … Deutsch Wikipedia
operand — noun Etymology: Latin operandum, neuter of gerundive of operari Date: 1853 something (as a quantity or data) that is operated on (as in a mathematical operation); also the address in a computer instruction of data to be operated on … New Collegiate Dictionary
One instruction set computer — Computer science portal A one instruction set computer (OISC), sometimes called an ultimate reduced instruction set computer (URISC), is an abstract machine that uses only one instruction – obviating the need for a machine language opcode … Wikipedia
Orthogonal instruction set — is a term used in computer engineering. A computer s instruction set is said to be orthogonal if any instruction can use data of any type via any addressing mode. The word orthogonal, which means right angle in this context, implies that it is… … Wikipedia
TEST (x86 instruction) — In the x86 assembly language, the TEST instruction performs a bitwise AND on two operands. The flags SF, ZF, PF, CF, OF and AF are modified while the result of the AND is discarded. There are 9 different opcodes for the TEST instruction depending … Wikipedia
